Publications HAL

2024

Journal articles

titre: Phase Change Memory Drift Compensation in Spiking Neural Networks Using a Non-Linear Current Scaling Strategy
auteur: Joao Henrique Quintino Palhares, Nikhil Garg, Yann Beilliard, Lorena Anghel, Fabien Alibart, Dominique Drouin, Philippe Galy
article: Journal of Low Power Electronics and Applications, 2024, 14 (4), pp.50. ⟨10.3390/jlpea14040050⟩
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titre: 28 nm FDSOI embedded PCM exhibiting near zero drift at 12 K for cryogenic SNNs
auteur: Joao Henrique Quintino Palhares, Nikhil Garg, Pierre-Antoine Mouny, Yann Beilliard, J. Sandrini, F. Arnaud, Lorena Anghel, Fabien Alibart, Dominique Drouin, Philippe Galy
article: npj Unconventional Computing, 2024, 1 (1), pp.8. ⟨10.1038/s44335-024-00008-y⟩
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titre: Techniques for detecting and masking faults in semantic segmentation applications
auteur: Stéphane Burel, Adrian Evans, Lorena Anghel
article: Microelectronics Reliability, 2024, 157, pp.115397. ⟨10.1016/j.microrel.2024.115397⟩
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titre: Programmable electrical coupling between stochastic magnetic tunnel junctions
auteur: Sidra Gibeault, Temitayo Adeyeye, Liam Pocher, Daniel Lathrop, Matthew Daniels, Mark Stiles, Jabez Mcclelland, William Borders, Jason Ryan, Philippe Talatchian, Ursula Ebels, Advait Madhavan
article: Physical Review Applied, 2024, 21 (3), pp.034064. ⟨10.1103/PhysRevApplied.21.034064⟩
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titre: Unbiased random bitstream generation using injection-locked spin-torque nano-oscillators
auteur: Nhat-Tan Phan, Nitin Prasad, Abderrazak Hakam, Ahmed Sidi El Valli, Lorena Anghel, Luana Benetti, Advait Madhavan, Alex S Jenkins, Ricardo Ferreira, Mark D Stiles, Ursula Ebels, Philippe Talatchian
article: Physical Review Applied, 2024, 21 (3), pp.034063. ⟨10.1103/PhysRevApplied.21.034063⟩
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titre: Fully analog 28nm FD-SOI hardware solution for drift and variability mitigation of embedded PCM memories in spiking neural networks
auteur: Joao Henrique Quintino Palhares, Yann Beilliard, Nikhil Garg, Lorena Anghel, F. Alibart, Dominique Drouin, Philippe Galy
article: Frontiers in Neuroscience, In press
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titre: Spatial-SpinDrop: Spatial dropout-based binary Bayesian neural network with spintronics implementation
auteur: Soyed Tuhin Ahmed, Kamal Danouchi, Michael Hefenbrock, Guillaume Prenat, Lorena Anghel, Mehdi Tahoori
article: IEEE Transactions on Nanotechnology, 2024, 23, pp.636-643. ⟨10.1109/TNANO.2024.3445455⟩
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titre: Measurement-driven Langevin modeling of superparamagnetic tunnel junctions
auteur: Liam Pocher, Temitayo Adeyeye, Sidra Gibeault, Philippe Talatchian, Ursula Ebels, Daniel Lathrop, Jabez Mcclelland, Mark Stiles, Advait Madhavan, Matthew Daniels
article: Physical Review Applied, 2024, 22 (1), pp.014057. ⟨10.1103/PhysRevApplied.22.014057⟩
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Conference papers

titre: Trade-offs in Neural Network Compression: Quantized and Binary Models for Keyword Spotting
auteur: Bruno Lovison-Franco, Jonathan Miquel, Aymen Romdhane, Guillaume Prenat, Lorena Anghel, David Novo, Pascal Benoit
article: ICECS 2024 - 31st IEEE International Conference on Electronics Circuits and Systems, Nov 2024, Nancy, France. In press
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titre: Leveraging stochastic properties of spintronic nanodevices for unconventional computing
auteur: Nhat Tan Phan, Lucile Soumah, Louise Desplat, Jonathan Peters, Nitin Prasad, Abderrazak Hakam, Ahmed Sidi El Valli, Lorena Anghel, Luana Benetti, Alex Jenkins, Ricardo Ferreira, Florian Disdier, Liliana Buda-Prejbeanu, Ricardo Sousa, Advait Madhavan, Mark D. Stiles, Ursula Ebels, Philippe Talatchian
article: Spintronics XVII, Aug 2024, San Diego, France. pp.41, ⟨10.1117/12.3027425⟩
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titre: SMTJ-based Dropout Module for In-Memory Computing Bayesian Neural Networks
auteur: Kamal Danouchi, Guillaume Prenat, Lorena Anghel
article: 2024 IEEE 24th International Conference on Nanotechnology (NANO), Jul 2024, Gijon, France. pp.501-506, ⟨10.1109/NANO61778.2024.10628972⟩
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titre: Testing spintronics implemented Monte Carlo dropout-based Bayesian neural networks
auteur: Soyed Tuhin Ahmed, Kamal Danouchi, Michael Hefenbrock, Guillaume Prenat, Lorena Anghel, Mehdi Tahoori
article: ETS 2024 - IEEE European Test Symposium, May 2024, La Haye, Netherlands. pp.1-6, ⟨10.1109/ETS61313.2024.10567852⟩
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titre: Ferroelectric spin orbit devices for ultralow power computing
auteur: Salvatore Teresi, Paolo Sgarro, Aurélie Kandazoglou, Théo Frottier, Maxime Culot, Williams Savero Torres, Chadi Al Khatib, Maxen Cosset-Cheneau, Cécile Grèzes, Pierre Noé, Louis Hutin, Kevin Garello, Lorena Anghel, Guillaume Prenat, Laurent Vila, Manuel Bibes, Jean-Philippe Attané
article: 2024 8th IEEE Electron Devices Technology & Manufacturing Conference (EDTM), Mar 2024, Bangalore, India. pp.1-3, ⟨10.1109/EDTM58488.2024.10512348⟩
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Preprints, Working Papers, ...

titre: Nanosecond stochastic operation in perpendicular superparamagnetic tunnel junctions
auteur: Lucile Soumah, Louise Desplat, Nhat-Tan Phan, Ahmed Sidi El Valli, Advait Madhavan, Florian Disdier, Stéphane Auffret, Ricardo Sousa, Ursula Ebels, Philippe Talatchian
article: 2024
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2023

Journal articles

titre: SpinBayes: Algorithm-Hardware Co-Design for Uncertainty Estimation Using Bayesian In-Memory Approximation on Spintronic-Based Architectures
auteur: Soyed Tuhin Ahmed, Kamal Danouchi, Michael Hefenbrock, Guillaume Prenat, Lorena Anghel, Mehdi Tahoori
article: ACM Transactions on Embedded Computing Systems (TECS), 2023, 22 (5s), pp.1-25. ⟨10.1145/3609116⟩
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titre: Self-Test Library Generation for In-field Test of Path Delay faults
auteur: Lorena Anghel, Riccardo Cantoro, Riccardo Masante, Michele Portolan, Sandro Sartoni, Matteo Sonza Reorda
article: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2023, pp.1-1. ⟨10.1109/TCAD.2023.3268210⟩
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titre: Backpropagation-based learning techniques for deep spiking neural networks: a survey
auteur: Manon Dampfhoffer, Thomas Mesquida, Alexandre Valentian, Lorena Anghel
article: IEEE Transactions on Neural Networks and Learning Systems, 2023, pp.1-16. ⟨10.1109/TNNLS.2023.3263008⟩
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titre: MOZART+: Masking Outputs with Zeros for Improved Architectural Robustness and Testing of DNN Accelerators
auteur: Stephane Burel, Adrian Evans, Lorena Anghel
article: IEEE Transactions on Device and Materials Reliability, 2023, 22 (2), pp.120-128. ⟨10.1109/TDMR.2022.3159089⟩
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titre: A tunable and versatile 28nm FD-SOI crossbar output circuit for low power analog SNN inference with eNVM synapses
auteur: Joao Henrique Quintino Palhares, Yann Beilliard, Jury Sandrini, Franck Arnaud, Kevin Garello, Guillaume Prenat, Lorena Anghel, Fabien Alibart, Dominique Drouin, Philippe Galy
article: Solid-State Electronics, 2023, 209, pp.108779. ⟨10.1016/j.sse.2023.108779⟩
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Conference papers

titre: Evaluating the Impact of Aging on Path-Delay Self-Test Libraries
auteur: Riccardo Cantoro, Sandro Sartoni, Matteo Sonza Reorda, Lorena Anghel, Michele Portolan
article: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT 2023), Oct 2023, Juan-les-Pins, France. pp.1-7, ⟨10.1109/DFT59622.2023.10313531⟩
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titre: Minimum SRAM Retention Voltage: Insight about optimizing Power Efficiency across Temperature Profile, Process Variation and Aging
auteur: Y. Aslan, F. Cacho, T. Kumar, D. Janardan, A. Kumar, F. Giner, M. Faurichon, Lorena Anghel
article: 2023 IEEE 29th International Symposium on On-Line Testing and Robust System Design (IOLTS), IEEE, Jul 2023, Crete, Greece. pp.1-6, ⟨10.1109/IOLTS59296.2023.10224895⟩
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titre: Probabilistic Bitstream Generator based on Superparamagnetic Tunnel Junctions
auteur: Kamal Danouchi, Guillaume Prenat, Lorena Anghel
article: 2023 IEEE 23rd International Conference on Nanotechnology (NANO), Jul 2023, Jeju City, South Korea. pp.638-642, ⟨10.1109/NANO58406.2023.10231253⟩
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titre: Robustness and Power Efficiency in Spin-Orbit Torque-Based Probabilistic Logic Circuits
auteur: Kamal Danouchi, Guillaume Prenat, Philippe Talatchian, Louis Hutin, Lorena Anghel
article: 2023 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), IEEE, Jun 2023, Foz do Iguacu, Brazil. pp.1-6, ⟨10.1109/ISVLSI59464.2023.10238682⟩
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titre: Leveraging sparsity with Spiking Recurrent Neural Networks for energy-efficient keyword spotting
auteur: Manon Dampfhoffer, Thomas Mesquida, Emmanuel Hardy, Alexandre Valentian, Lorena Anghel
article: 2023 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP 2023), Jun 2023, Ixia-Ialyssos, Greece. ⟨10.1109/ICASSP49357.2023.10097174⟩
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titre: On Using Cell-Aware Methodology for SRAM Bit Cell Testing
auteur: Xhesila Xhafa, Aymen Ladhar, Eric Faehn, Lorena Anghel, Gregory Di Pendina, Patrick Girard, Arnaud Virazel
article: ETS 2023 - 28th IEEE European Test Symposium, May 2023, Venezia, Italy. pp.1-4, ⟨10.1109/ETS56758.2023.10174118⟩
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titre: Embedded Tutorial: Hardware design and Reliability Mitigation of Binary Bayesian Reasoning Speakers: Lorena Anghel (Grenoble INP) and Mehdi Tahoori (KIT)
auteur: Lorena Anghel, Mehdi Tahoori
article: IEEE VLSI Test Symposium, IEEE, Apr 2023, San Diego (CA), United States
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titre: Scalable Spintronics-based Bayesian Neural Network for Uncertainty Estimation
auteur: Soyed Tuhin Ahmed, Kamal Danouchi, Michael Hefenbrock, Guillaume Prenat, Lorena Anghel, Mehdi Tahoori
article: 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE), Apr 2023, Antwerp, Belgium. pp.1-6, ⟨10.23919/DATE56975.2023.10137167⟩
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2022

Journal articles

titre: Spintronic Memristor based Binarized Ensemble Convolutional Neural Network Architectures
auteur: Ghislain Takam Tchendjou, Kamal Danouchi, Guillaume Prenat, Lorena Anghel
article: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2022, pp.1-1. ⟨10.1109/TCAD.2022.3213612⟩
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titre: A fast, energy efficient and tunable magnetic tunnel junction based bitstream generator for stochastic computing
auteur: Etienne Becle, Guillaume Prenat, Philippe Talatchian, Lorena Anghel, Ioan-Lucian Prejbeanu
article: IEEE Transactions on Circuits and Systems I: Regular Papers, 2022, 69 (8), pp.3251-3259. ⟨10.1109/TCSI.2022.3173030⟩
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titre: Investigating current-based and gating approaches for accurate and e-efficient spiking recurrent neural networks
auteur: Manon Dampfhoffer, Thomas Mesquida, Alexandre Valentian, Lorena Anghel
article: Lecture Notes in Computer Science, 2022, Artificial Neural Networks and Machine Learning – ICANN 2022, 13531, pp.359-370. ⟨10.1007/978-3-031-15934-3_30⟩
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titre: Design-time exploration for process, environment and aging compensation techniques for low power reliable-Aware design
auteur: Lorena Anghel, Florian Cacho
article: IEEE Transactions on Emerging Topics in Computing, 2022, 10 (2), pp.581-590. ⟨10.1109/TETC.2021.3136288⟩
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Conference papers

titre: Binary Bayesian Neural Networks for Efficient Uncertainty Estimation Leveraging Inherent Stochasticity of Spintronic Devices
auteur: Soyed Tuhin Ahmed, Kamal Danouchi, Christopher Münch, Guillaume Prenat, Lorena Anghel, Mehdi B Tahoori
article: 17th ACM International Symposium on Nanoscale Architectures, Association for Computing machinery, Dec 2022, Virtual conference, United States. ⟨10.1145/3565478.3572536⟩
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titre: Electrical Coupling of Perpendicular Superparamagnetic Tunnel Junctions for Probabilistic Computing
auteur: Nhat-Tan Phan, Lucile Soumah, Ahmed Sidi El Valli, Louis Hutin, Lorena Anghel, Ursula Ebels, Philippe Talatchian
article: NANOARCH '22: 17th ACM International Symposium on Nanoscale Architectures, ACM, Dec 2022, Virtual OR USA, United States. pp.1-6, ⟨10.1145/3565478.3572528⟩
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titre: Improving DNN fault tolerance in semantic segmentation applications
auteur: Stéphane Burel, Adrian Evans, Lorena Anghel
article: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), Oct 2022, Austin, United States. pp.1-6, ⟨10.1109/DFT56152.2022.9962354⟩
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titre: Spin Orbit Torque-based Crossbar Array for Error Resilient Binary Convolutional Neural Network
auteur: Kamal Danouchi, Guillaume Prenat, Lorena Anghel
article: 23RD IEEE LATIN-AMERICAN TEST SYMPOSIUM, Sep 2022, Montevideo, Uruguay
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titre: On Using Cell-Aware Models for Representing SRAM Architecture
auteur: Xhesila Xhafa, Aymen Ladhar, Eric Faehn, Lorena Anghel, Gregory Di Pendina, Patrick Girard, Arnaud Virazel
article: 16e Colloque National du GDR SoC², Jun 2022, Strasbourg, France
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2021

Journal articles

titre: Mutual control of stochastic switching for two electrically coupled superparamagnetic tunnel junctions
auteur: Philippe Talatchian, Matthew W Daniels, Advait Madhavan, Matthew R Pufall, Emilie Jué, William H Rippard, Jabez J Mcclelland, Mark D Stiles
article: Physical Review B, 2021, 104 (5), pp.054427. ⟨10.1103/PhysRevB.104.054427⟩
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titre: Beyond the gyrotropic motion: dynamic C-state in vortex spin torque oscillators
auteur: Steffen Wittrock, Philippe Talatchian, Miguel Romera Rabasa, Samh Menshawy, Mafalda Jotta Garcia, Marie-Claire Cyrille, Ricardo Ferreira, Romain Lebrun, Paolo Bortolotti, Ursula Ebels, Julie Grollier, Vincent Cros
article: Applied Physics Letters, 2021, 118 (1), pp.012404. ⟨10.1063/5.0029083⟩
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titre: Activity-aware prediction of Critical Paths Aging in FDSOI technologies
auteur: K. Senthamarai Kannan, Michele Portolan, Lorena Anghel
article: Microelectronics Reliability, 2021, 124, ⟨10.1016/j.microrel.2021.114261⟩
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Conference papers

titre: Ensemble neural networks with spintronic devices - Opportunities and challenges (KEYNOTE TALK)
auteur: Lorena Anghel
article: IEEE / ACM International Symposium on Nanoscale Architectures, Nov 2021, On line conference, France
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titre: Zero-Overhead Protection for CNN Weights
auteur: Stéphane Burel, Adrian Evans, Lorena Anghel
article: 2021 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), Oct 2021, Athens (virtual), Greece. ⟨10.1109/DFT52944.2021.9568363⟩
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titre: Fast behavioral VerilogA compact model for stochastic MTJ
auteur: Etienne Becle, Philippe Talatchian, Guillaume Prenat, Lorena Anghel, Ioan-Lucian Prejbeanu
article: ESSDERC 2021 - IEEE 51st European Solid-State Device Research Conference, Sep 2021, Grenoble, France. pp.259-262, ⟨10.1109/ESSDERC53440.2021.9631829⟩
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titre: MOZART: Masking Outputs with Zeros for Architectural Robustness and Testing of DNN Accelerators
auteur: Stéphane Burel, Adrian Evans, Lorena Anghel
article: IEEE International On-Line Testing Symposium, Jun 2021, OnLine, France
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titre: Monitoring setup and hold timing limits
auteur: Lorena Anghel, F. Cacho, X. Federspiel
article: 2021 IEEE International Reliability Physics Symposium (IRPS), Mar 2021, Monterey, France. pp.1-6, ⟨10.1109/IRPS46558.2021.9405175⟩
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2020

Journal articles

titre: Influence of flicker noise and nonlinearity on the frequency spectrum of spin torque nano-oscillators
auteur: Steffen Wittrock, Philippe Talatchian, Sumito Tsunegi, Denis Crété, Kay Yakushiji, Paolo Bortolotti, Ursula Ebels, Akio Fukushima, Hitoshi Kubota, Shinji Yuasa, Julie Grollier, Gilles Cibiel, Serge Galliou, Enrico Rubiola, Vincent Cros
article: Scientific Reports, 2020, 10 (1), ⟨10.1038/s41598-020-70076-0⟩
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titre: Stuck-At Fault Mitigation of Emerging Technologies Based Switching Lattices
auteur: Lorena Anghel, A. Bernasconi, V. Ciriani, L. Frontini, G. Trucco, Elena Ioana Vatajelu
article: Journal of Electronic Testing: : Theory and Applications, 2020, pp.313-326. ⟨10.1007/s10836-020-05885-2⟩
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titre: Designing Large Arrays of Interacting Spin-Torque Nano-Oscillators for Microwave Information Processing
auteur: P. Talatchian, M. Romera, F. Abreu Araujo, P. Bortolotti, Vincent Cros, D. Vodenicarevic, N. Locatelli, D. Querlioz, J. Grollier
article: Physical Review Applied, 2020, 13 (2), ⟨10.1103/PhysRevApplied.13.024073⟩
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titre: Circuit Design Steps for Nano-Crossbar Arrays: Area-Delay-Power Optimization with Fault Tolerance
auteur: Muhammed Ceylan Morgül, L. Frontini, O. Tunali, Lorena Anghel, V. Ciriani, Elena Ioana Vatajelu, C.A. Moritz, Mircea Stan, D. Alexandrescu, M. Altun
article: IEEE Transactions on Nanotechnology, 2020, pp.39-53. ⟨10.1109/TNANO.2020.3044017⟩
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titre: Influence of flicker noise and nonlinearity on the frequency spectrum of spin torque nano-oscillators
auteur: Steffen Wittrock, Philippe Talatchian, Sumito Tsunegi, Denis Crété, Kay Yakushiji, Paolo Bortolotti, Ursula Ebels, Akio Fukushima, Hitoshi Kubota, Shinji Yuasa, Julie Grollier, Gilles Cibiel, Serge Galliou, Enrico Rubiola, Vincent Cros
article: Scientific Reports, 2020, 10 (13116), pp.10. ⟨10.1038/s41598-020-70076-0⟩
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Conference papers

titre: New Perspectives on Core In-ﬁeld Path Delay Test
auteur: Lorena Anghel, Riccardo Cantoro, D. Foti, Michele Portolan, S. Sartoni, Matteo Sonza Reorda
article: International Test Conference (ITC 2020), Nov 2020, Washington DC, United States
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titre: From 1.8V to 0.19V voltage bias on analog spiking neuron in 28nm UTBB FD-SOI technology
auteur: V. Cinçon, Elena Ioana Vatajelu, Lorena Anghel, Philippe Galy
article: EUROSOI-ULIS 2020, Sep 2020, Caen, France
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titre: A Comprehensive End-to-end Solution for a Secure and Dynamic Mixed-signal 1687 System
auteur: Michele Portolan, R. Silveira Feitoza, G. Takam Tchendjou, V. Reynaud, K. Senthamarai Kannan, Manuel J. Barragan, Emmanuel Simeu, Paolo Maistri, Lorena Anghel, Régis Leveugle, Salvador Mir
article: 2020 International Symposium on On-Line Testing and Robust System Design (IOLTS 2020), Jul 2020, Naples (Virtual Conference), Italy. ⟨10.1109/IOLTS50870.2020.9159721⟩
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titre: State of the art in hardware-accelerated neural networks
auteur: Frédéric Pétrot, Lorena Anghel, Liliana Lilibeth Andrade Porras
article: Applied Machine Learning Days (AMLD 2020), Jan 2020, Lausanne, Switzerland
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Book sections

titre: Design techniques to improve the resilience of computing systems: logic layer
auteur: Lorena Anghel, M. Nicolaidis
article: Cross-Layer Reliability of Computing Systems, iet - the institution of engineering and technology, pp.23-42, 2020
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2019

Journal articles

titre: Topology and design investigation on thin film silicon BIMOS device for ESD protection in FD-SOI technology
auteur: Philippe Galy, Louise de Conti, G. Delahaye, Lorena Anghel, Maud Vinet, S. Cristoloveanu
article: Microelectronics Reliability, 2019, ⟨10.1016/j.microrel.2019.06.069⟩
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Conference papers

titre: Aging Investigation of Digital Circuits using In-Situ Monitors
auteur: R. Shah, F. Cacho, Lorena Anghel
article: IEEE International Integrated Reliability Workshop (IIRW 2019), Oct 2019, Stanford Sierra, Fallen Leaf Lake, United States
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titre: Rebooting Computing: The Challenges for Test and Reliability
auteur: Alberto Bosio, Ian O'Connor, G. Rodrigues, F. Lima, Elena Ioana Vatajelu, Giorgio Di Natale, Lorena Anghel, S. Nagarajan, M. R. Fieback, S. Hamdioui
article: 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), Oct 2019, Noordwijk, Netherlands. pp.8138-8143, ⟨10.1109/DFT.2019.8875270⟩
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titre: Memory-Centric Neuromorphic Computing With Nanodevices
auteur: Damien Querlioz, Tifenn Hirtzlin, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Marc Bocquet, Jean-Michel Portal, Miguel Romera, Philippe Talatchian, Julie Grollier
article: Biomedical Circuits and Systems Conference (BiOCAS), Oct 2019, Nara, Japan. ⟨10.1109/BIOCAS.2019.8919010⟩
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titre: Topology and design investigation on thin film silicon BIMOS device for ESD protection in FD-SOI technology
auteur: Philippe Galy, Louise de Conti, Maud Vinet, S. Cristoloveanu, G. Delahaye, Lorena Anghel
article: 30th European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF'2019), Sep 2019, Toulouse, France
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titre: Managing Aging Induced Reliability at Run-time
auteur: Lorena Anghel
article: 7th Workshop on Cross-layer Resiliency (IWCR'2019), Jul 2019, Stuttgart, Germany
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titre: Embedded Hardware Architectures for AI
auteur: Lorena Anghel
article: From Brain and Cognition to Artificial Intelligence Workshop, Jun 2019, Grenoble, France
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titre: Flexi-AES: A Highly-Parameterizable Cipher for a Wide Range of Design Constraints
auteur: S. Mosanu, X. Guo, Lorena Anghel, Mircea Stan
article: IEEE 27th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM'2019), Apr 2019, San Diego, United States
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titre: Special Session: Reliability of Hardware-Implemented Spiking Neural Networks (SNN)
auteur: Elena Ioana Vatajelu, Giorgio Di Natale, Lorena Anghel
article: IEEE VLSI Test Symposium (VTS 2019), Apr 2019, Monterey, United States
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titre: Hidden-Delay-Fault Sensor for Test, Reliability and Security
auteur: Giorgio Di Natale, Elena Ioana Vatajelu, K. Senthamarai Kannan, Lorena Anghel
article: IEEE Design Automation and Test Conference in Europe (DATE 2019), Mar 2019, Florence, Italy
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titre: Run-time Age Induced Reliability Prediction for SOC
auteur: Lorena Anghel
article: IEEE Latin America Test Symposium (LATS 2019), Mar 2019, Santiago de Chile, Chile
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Book sections

titre: On-Chip Ageing Monitoring and System Adaptation
auteur: Lorena Anghel, R. Shah, F. Cacho
article: Ageing of Integrated Circuits: Causes, Effects and Mitigation TechniquesOn-Chip Ageing Monitoring and System Adaptation, pp.149-180, 2019, 978-3-030-23780-6. ⟨10.1007/978-3-030-23781-3_6⟩
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Theses

titre: Bio-inspired computing leveraging the synchronization of magnetic nano-oscillators
auteur: Philippe Talatchian
article: Disordered Systems and Neural Networks [cond-mat.dis-nn]. Université Paris Saclay (COmUE), 2019. English. ⟨NNT : 2019SACLS008⟩
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2018

Journal articles

titre: Vowel recognition with four coupled spin-torque nano-oscillators
auteur: Miguel Romera, Philippe Talatchian, Sumito Tsunegi, Flavio Abreu Araujo, Vincent Cros, Paolo Bortolotti, Juan Trastoy, Kay Yakushiji, Akio Fukushima, Hitoshi Kubota, Shinji Yuasa, Maxence Ernoult, Damir Vodenicarevic, Tifenn Hirtzlin, Nicolas Locatelli, Damien Querlioz, Julie Grollier
article: Nature, 2018, 563 (7730), pp.230-234. ⟨10.1038/s41586-018-0632-y⟩
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titre: Test and Reliability in Approximate Computing
auteur: Lorena Anghel, Mounir Benabdenbi, Alberto Bosio, Marcello Traiola, Elena Ioana Vatajelu
article: Journal of Electronic Testing: : Theory and Applications, 2018, 34 (4), pp.375-387. ⟨10.1007/s10836-018-5734-9⟩
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Conference papers

titre: Neuromorphic Computing - From Robust Hardware Architectures to Testing Strategies
auteur: Lorena Anghel, Giorgio Di Natale, Benoit Miramond, Elena Ioana Vatajelu, E. Vianello
article: 26th IFIP IEEE International Conference on Very Large Scale Integration (VLSI SOC 2018), Oct 2018, Verona, Italy. pp.176-179, ⟨10.1109/VLSI-SoC.2018.8644897⟩
Accès au bibtex

titre: Integrated Synthesis Methodology for Crossbar Arrays
auteur: Muhammed Ceylan Morgül, L. Frontini, Elena Ioana Vatajelu, Lorena Anghel
article: IEEE NANOARCH'2018, Jul 2018, Athens, Greece
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titre: Neuromorphic Circuits
auteur: Lorena Anghel
article: L’Intelligence Naturelle au cœur des enjeux de l’Intelligence Artificielle – Les atouts du site grenoblois, Jul 2018, Grenoble, France
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titre: Resistive and spintronic RAMs: device, simulation, and applications
auteur: Elena Ioana Vatajelu, Lorena Anghel, Jean-Michel Portal, Marc Bocquet, Guillaume Prenat
article: IOLTS 2018 - IEEE 24th International Symposium on On-Line Testing And Robust System Design, Jul 2018, Platja d'Aro, Spain. pp.109-114, ⟨10.1109/IOLTS.2018.8474226⟩
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titre: NBTI aged cell rejuvenation with back biasing and resulting critical path reordering for digital circuits in 28nm FDSOI
auteur: A. Sivadasan, R. Shah, F. Cacho, Lorena Anghel
article: Design Automation and Test in Europe (DATE'2018), Mar 2018, Dresden, Germany
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titre: Investigation of speed sensors accuracy for process and aging compensation
auteur: R. Shah, F. Cacho, Lorena Anghel
article: IEEE International reliability Physics Symposium (IRPS'2018), Mar 2018, San Francisco, United States
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2017

Journal articles

titre: Logic synthesis and testing techniques for switching nano-crossbar arrays
auteur: D. Alexandrescu, M. Altun, Lorena Anghel, V. Ciriani, Mehdi B. Tahoori, A. Bernasconi
article: Microprocessors and Microsystems: Embedded Hardware Design , 2017, 54, pp.14-25. ⟨10.1016/j.micpro.2017.08.004⟩
Accès au texte intégral et bibtex

Conference papers

titre: Fully-Connected Single-Layer STT-MTJ-based Spiking Neural Network under Process Variability
auteur: Elena Ioana Vatajelu, Lorena Anghel
article: ACM/IEEE International Symposium on Nanoscale Architectures - NANOARCH, Jul 2017, Newport, RI, United States
Accès au bibtex

titre: Test and reliability in approximate computing
auteur: Lorena Anghel, Mounir Benabdenbi, Alberto Bosio, Elena Ioana Vatajelu
article: IMSTW: International Mixed-Signal Testing Workshop, Jul 2017, Thessaloniki, Greece. ⟨10.1109/IMS3TW.2017.7995210⟩
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titre: Investigation of critical path selection for in-situ monitors insertion
auteur: F. Cacho, A. Benhassain, R. Shah, V. Huard, Lorena Anghel
article: 23rd International Symposium on On-Line Testing and Robust System Design (IOLTS 2017), Jul 2017, Thessaloniki, Greece. pp.247-252
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titre: Reliability Analysis of MTJ-based Functional Module for Neuromorphic Computing
auteur: Elena Ioana Vatajelu, Lorena Anghel
article: International Symposium on On-Line Testing and Robust System Design (IOLTS'17), Jun 2017, Thessaloniki, Greece
Accès au bibtex

titre: Architecture and Workload Dependant Digital Failure Rate
auteur: Ajith Sivadasan, S. Mhira, Armelle Notin, A. Benhassain, V. Huard, Etienne Maurin, F. Cacho, Lorena Anghel, A. Bravaix
article: IEEE International Reliability for Physics of Semiconductors (IRPS 2017), Apr 2017, Monterey, United States. ⟨10.1109/IRPS.2017.7936357⟩
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titre: Worload Dependent Reliability Timing Analysis Flow
auteur: A. Sivadasan, V. Huard, Lorena Anghel
article: DATE 2017, Mar 2017, Lausanne, Switzerland
Accès au bibtex

Book sections

titre: Manufacturing Threats
auteur: Saman Kiamehr, Mehdi B. Tahoori, Lorena Anghel
article: Dependable Multicore Architectures at Nanoscale, springer, pp.3-35, 2017, 978-3-319-54421-2. ⟨10.1007/978-3-319-54422-9⟩
Accès au bibtex

titre: Adaptive Routing for Fault Tolerance and Congestion Avoidance for 2D Mesh and Torus NoCs in Many-Core Systems-on-Chip
auteur: Mounir Benabdenbi, Lorena Anghel, M. Dimopoulos, Yi Gang
article: Advances in Microelectronics: Reviews, ifsa, international frequency sensor association, pp.405-435, 2017, 978-84-615-9012-4
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2016

Journal articles

titre: Enhancing the injection locking range of spin torque oscillators through mutual coupling
auteur: M. Romera, P. Talatchian, R. Lebrun, K.J. Merazzo, P. Bortolotti, L. Vila, J. Costa, R. Ferreira, P. P. Freitas, M.-C. Cyrille, U. Ebels, V. Cros, J. Grollier
article: Applied Physics Letters, 2016, 109, pp.252404 ⟨10.1063/1.4972346⟩
Accès au bibtex

titre: Non-volatile magnetic decoder based on MTJs
auteur: E.Y. Deng, Guillaune Prenat, Lorena Anghel, W.S. Zhao
article: Electronics Letters, 2016, 52 (21), pp.1774 - 1776. ⟨10.1049/el.2016.2450⟩
Accès au bibtex

Conference papers

titre: Paradigm shift in the level of Quality and Reliability in semiconductors to a level smaller than 10ppb
auteur: Lorena Anghel
article: Automotive Reliability and Test Workshop, Nov 2016, Fort Worth, United States
Accès au bibtex

titre: Managing Wear out and Variability Monitors: IEEE 1687 to the Rescue
auteur: Lorena Anghel, Michele Portolan
article: East West Design and test Symposium, Oct 2016, Yerevan, Armenia
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titre: Synthesis and Performance Optimization of a Switching Nano-crossbar Computer
auteur: D. Alexandrescu, M. Altun, Lorena Anghel, A. Bernasconi, V. Ciriani, L. Frontini, Mehdi B. Tahoori
article: Euromicro Conference on Digital System Design (Euromicro DSD/SEAA'16), Aug 2016, Limassol, Cyprus
Accès au bibtex

titre: Multi-context Non-volatile Content Addressable Memory Using Magnetic Tunnel Junctions
auteur: E. Deng, Guillaune Prenat, Lorena Anghel, W. Zhao
article: 12th ACM/IEEE International Symposium on Nanoscale Architectures (NANOARCH'16), Jul 2016, Beijing, China
Accès au bibtex

titre: Multi-context non-volatile content addressable memory using magnetic tunnel junctions
auteur: Erya Deng, Guillaune Prenat, Lorena Anghel, Weisheng S Zhao
article: Nanoarch, Jul 2016, Beijing, China
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titre: In-Situ Slack Monitors : Taking up the Challenge of On-die Monitoring of Variability and Reliability
auteur: A. Benhassain, S. Mhira, F. Cacho, V. Huard, Lorena Anghel
article: International Verification and Security Workshop, Jul 2016, Sant Feliu de Guixols, Spain
Accès au bibtex

titre: A Hybrid Algorithm to Conservatively Check the Robustness of Circuits
auteur: N. Thole, Lorena Anghel, G. Fey
article: IEEE European Test Symposium (ETS'16), May 2016, Amsterdam, Netherlands
Accès au bibtex

titre: System Failure Prediction with On-Chip Monitors
auteur: Lorena Anghel
article: Colloque National 2016 de GDR SOC-SIP, May 2016, Nantes, France
Accès au bibtex

titre: Early system failure prediction by using aging in situ monitors: Methodology of implementation and application results
auteur: Lorena Anghel, A. Benhassain, A. Sivadasan
article: IEEE 34th VLSI Test Symposium (VTS'16), Apr 2016, Las Vegas, NE, United States
Accès au bibtex

titre: Robustness of Timing in-situ Monitors for AVS Management
auteur: A. Benhassain, F. Cacho, V. Huard, S. Mhira, Lorena Anghel, C. Parthasarathy, A. Jain, A. Sivadasan
article: IEEE International Reliability Physics Semiconductor (IRPS'16), Apr 2016, Passadena, United States
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titre: Workload Impact on BTI HCI Induced Aging of Digital Circuits: A System level Analysis
auteur: A. Sivadasan, F. Cacho, A. Benhassain, V. Huard, Lorena Anghel
article: Workshop on Early Reliability Modeling for Aging and Variability in Silicon Systems, Mar 2016, Dresden, Germany
Accès au bibtex

titre: Early failure prediction by using in-situ monitors: Implementation and application results
auteur: A. Benhassain, F. Cacho, V. Huard, Lorena Anghel
article: Workshop on Early Reliability Modeling for Aging and Variability in Silicon Systems, Mar 2016, Dresden, Germany
Accès au bibtex

titre: Study of workload impact on BTI HCI induced aging of digital circuits
auteur: A. Sivadasan, F. Cacho, A. Benhassain, V. Huard, Lorena Anghel
article: Design Automation and Test in Europe (DATE'16), Mar 2016, Dresden, Germany
Accès au bibtex

titre: Moniteurs de fiabilité embarqués en technologie FDSOI: Implémentation et Applications
auteur: Lorena Anghel
article: Ecole d'hiver Francophone sur les Technologies de Conception des Systèmes Embarqués Hétérogènes (FETCH'16), Jan 2016, Vilard de Lans, France
Accès au bibtex

2015

Journal articles

titre: Dependable Multicore Architectures at Nanoscale: The View From Europe
auteur: M. Ottavi, S. Pontarelli, D. Gizopoulos, C. Bolchini, M.K. Michael, Lorena Anghel, Mehdi B. Tahoori, A. Paschalis, P. Reviriego, O. Bringmann, V. Izosimov, H. Manhaeve, C. Strydis, S. Hamdioui
article: IEEE Design & Test, 2015, 32 (2), pp.17-28. ⟨10.1109/MDAT.2014.2359572⟩
Accès au texte intégral et bibtex

Conference papers

titre: Reliability Measurements with In Situ Aging Monitors in FDSOI Technology
auteur: Lorena Anghel
article: International Test Conference (ITC'15), Oct 2015, Anaheim, United States
Accès au bibtex

titre: Timing in-situ monitors: Implementation strategy and applications results
auteur: A. Benhassain, F. Cacho, V. Huard, M. Saliva, Lorena Anghel, C. Parthasarathy, A. Jain, F. Giner
article: IEEE Custom Integrated Circuits Conference (ICICC'16), Sep 2015, San Jose, CA, United States
Accès au bibtex

titre: Application-independent testing of multilevel interconnect in mesh-based FPGAs
auteur: Saif-Ur Rehman, Mounir Benabdenbi, Lorena Anghel
article: IEEE 10th International Conference on Design and Technologies for Integrated System in Nanoscale (DTIS'15), Apr 2015, Naples, Italy. pp.1-6
Accès au bibtex

titre: Impact of Gate Oxide Breakdown in Logic Gates from 28nm FDSOI CMOS technology
auteur: M. Saliva, F. Cacho, C. Ndiaye, V. Huard, D. Angot, A. Bravaix, Lorena Anghel
article: IEEE International Reliability Physics Symposium (IRPS'15), Apr 2015, Monterrey, CA, United States. pp.CA.4.1 - CA.4.6
Accès au bibtex

titre: Digital circuits reliability with in-situ monitors in 28nm fully depleted SOI
auteur: M. Saliva, F. Cacho, V. Huard, X. Federspiel, D. Angot, A. Benhassain, A. Bravaix, Lorena Anghel
article: Design, Automation & Test in Europe Conference & Exhibition (DATE'15), Mar 2015, Grenoble, France. pp.441-446
Accès au bibtex

2014

Journal articles

titre: Fault-Tolerant Adaptive Routing under an Unconstrained Set of Node and Link Failures for Many-Core Systems-on-Chip
auteur: M. Dimopoulos, Yi Gang, Lorena Anghel, Mounir Benabdenbi, Nacer-Eddine Zergainoh, M. Nicolaidis
article: Microprocessors and Microsystems: Embedded Hardware Design , 2014, 38 (6), pp.620-635. ⟨10.1016/j.micpro.2014.04.003⟩
Accès au bibtex

Conference papers

titre: Exploring the state dependent SET sensitivity of asynchronous logic - The muller-pipeline example
auteur: A. Steininger, V.S. Veeravalli, D. Alexandrescu, E. Costenaro, Lorena Anghel
article: 32nd IEEE International Conference on Computer Design (ICCD'14), Oct 2014, Seoul, North Korea. pp.61-67
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titre: Impact of Cluster Size on Routability, Testability and Robustness of a Cluster in a Mesh FPGA
auteur: Saif-Ur Rehman, Adrien Blanchardon, Arwa Ben Dhia, Mounir Benabdenbi, Roselyne Chotin-Avot, Lirida Naviner, Lorena Anghel, Habib Mehrez, Emna Amouri, Zied Marrakchi
article: IEEE Computer Society Annual Symposium on VLSI (ISVLSI'14), Jul 2014, Tampa, FL, United States. pp.553-558, ⟨10.1109/ISVLSI.2014.66⟩
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titre: Cost-efficient of a cluster in a mesh SRAM-based FPGA
auteur: Saif-Ur Rehman, Mounir Benabdenbi, Lorena Anghel
article: IEEE 20th International On-Line Testing Symposium (IOLTS'14), Jul 2014, Platja d'Aro, Girona, Spain. pp.75-80
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titre: New Insight about Oxide Breakdown Occurrence at Circuit Level
auteur: M. Saliva, F. Cacho, V. Huard, D. Angot, M. Durand, X. Federspiel, M. Parra, A. Bravaix, Lorena Anghel, Philippe Blanc-Benon
article: IEEE International Reliability Physics Symposium (IRPS'14), Jun 2014, Waikoloa, HI, United States
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titre: Single Event Effects in Muller C-Elements and Asynchronous Circuits Over a Wide Energy Spectrum
auteur: Lorena Anghel, V. Savulimedu Veeravalli, D. Alexandrescu, A. Steininger, K. Schneider-Hornstein, E. Costenaro
article: The 10th IEEE Workshop on Silicon Errors in Logic - System Effects (SELSE'14), Apr 2014, Stanford, United States
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titre: Efficient Fault-Tolerant Adaptive Routing under an unconstrained Set of Node and Link Failures for Many Cores System On Chip
auteur: M. Dimopoulos, Yi Gang, Mounir Benabdenbi, Lorena Anghel
article: Workshop on Dependable Multicore and Transactional Memory Systems (DMTM'14), (joint to HIPEAC event), Jan 2014, Vienna, Austria. pp.1-2
Accès au bibtex

titre: New Approaches in Soft Errors Fault Tolerant Design for digital circuits based on Double Sampling Techniques
auteur: Lorena Anghel
article: Ecole d'hiver Francophone sur les Technologies de Conception des Systèmes embarqués Hétérogènes (FETCH 2014), Jan 2014, Ottawa, Canada
Accès au bibtex

Books

titre: Editorial
auteur: Lorena Anghel, Cristiana Bolchini, Salvatore Pontarelli
article: Elsevier, 38 (6), pp.565 - 566, 2014, Microprocessors and Microsystems, ⟨10.1016/j.micpro.2014.07.003⟩
Accès au bibtex

2013

Journal articles

titre: Reliability of TSV interconnects: Electromigration, thermal cycling, and impact on above metal level dielectric
auteur: T. Frank, S. Moreau, C. Chappaz, P. Leduc, L. Arnaud, A. Thuaire, E. Chery, F. Lorut, Lorena Anghel, G. Poupon
article: Microelectronics Reliability, 2013, 53 (1), pp.17-29. ⟨10.1016/j.microrel.2012.06.021⟩
Accès au bibtex

Conference papers

titre: BIST for Logic and Local Interconnect Resources in a Novel Mesh of Cluster FPGA
auteur: Saif-Ur Rehman, Mounir Benabdenbi, Lorena Anghel
article: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), Oct 2013, New-York, United States. pp.296 - 301, ⟨10.1109/DFT.2013.6653622⟩
Accès au bibtex

titre: Fault-tolerant adaptive routing under permanent and temporary failures for many-core systems-on-chip
auteur: M. Dimopulos, Yi Gang, Mounir Benabdenbi, Lorena Anghel, Nacer-Eddine Zergainoh, M. Nicolaidis
article: IEEE International On-Line Testing symposium (IOLTS'13), Jul 2013, Chania, Crete, France. pp.7-12, ⟨10.1109/IOLTS.2013.6604043⟩
Accès au bibtex

2012

Journal articles

titre: Kth-Aggressor Fault (KAF)-based Thru-Silicon-Via Interconnect Built-In Self-Test and Diagnosis
auteur: V. Pasca, Lorena Anghel, Mounir Benabdenbi
article: Journal of Electronic Testing: : Theory and Applications, 2012, 28, pp.Online First™, 3 August. ⟨10.1007/s10836-012-5322-3⟩
Accès au bibtex

titre: CSL: Configurable Fault Tolerant Serial Links for Inter-die Communication in 3D Systems
auteur: V. Pasca, Lorena Anghel, M. Nicolaidis, Mounir Benabdenbi
article: Journal of Electronic Testing: : Theory and Applications, 2012, 28 (1), pp.137-150. ⟨10.1007/s10836-011-5260-5⟩
Accès au bibtex

Conference papers

titre: Through-Silicon-Via Built-In Self-Repair for Aggressive 3D Integration
auteur: M. Nicolaidis, V. Pasca, Lorena Anghel
article: IEEE 18th International On-Line Testing Symposium (IOLTS), Jun 2012, Sitges, Spain. pp.91-96, ⟨10.1109/IOLTS.2012.6313847⟩
Accès au bibtex

titre: Electromigration Behavior of 3D-IC TSV Interconnects
auteur: T. Frank, C. Chappaz, L. Arnaud, S. Moreau, P. Leduc, A. Thuaire, Lorena Anghel
article: 62nd Electronic Components and Technology Conference (ECTC'12), May 2012, San Diego, CA, United States. pp.326 - 330
Accès au bibtex

titre: Efficient link-level error resilience in 3D NoCs
auteur: V. Pasca, Saif-Ur Rehman, Lorena Anghel
article: IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS'12), Apr 2012, Tallinn, Estonia. pp.127-132, ⟨10.1109/DDECS.2012.6219038⟩
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titre: A predictive bottom-up hierarchical approach to digital system reliability
auteur: V. Huard, E. Pion, F. Cacho, D. Croain, V. Robert, R. Delater, P. Mergault, Sylvain Engels, Lorena Anghel, N.R. Amador
article: IEEE International Reliability Physics Symposium (IRPS'12), Apr 2012, Anaheim, CA, United States. pp.4B.1.1 - 4B.1.10, ⟨10.1109/IRPS.2012.6241830⟩
Accès au bibtex

titre: Electromigration degradation mechanism analysis of SnAgCu interconnects for eWLB package
auteur: T. Frank, C. Chappaz, L. Arnaud, X. Federspiel, F. Colella, E. Petitprez, Lorena Anghel
article: IEEE International Reliability Physics Symposium (IRPS'12), Apr 2012, Anaheim, CA, United States. pp.2E.5.1 - 2E.5.6, ⟨10.1109/IRPS.2012.6241792⟩
Accès au bibtex

titre: Designing Single Chip Massively Parallel Processors Affected by Extreme Failure Rates
auteur: M. Nicolaidis, Lorena Anghel, Nacer-Eddine Zergainoh, D. Avresky
article: Design, Automation & Test in Europe Conference & Exhibition (DATE'12), Mar 2012, Dresden, Germany
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titre: Design for Test and Reliability in Ultimate CMOS
auteur: M. Nicolaidis, Lorena Anghel, Nacer-Eddine Zergainoh, Y. Zorian, T. Karnik, K. Bowman, J. Tschanz, S.-L. Lu, C. Tokunaga, A. Raychowdhury, M. Khellah, J. Kulkarini, De Vivek, D. Avresky
article: Design, Automation and Test in Europe (DATE'12), Mar 2012, Dresden, Germany. pp.677-682
Accès au bibtex

titre: Towards Low-cost Soft Error Mitigation in SRAM-based FPGAs: a Case Study on AT40K
auteur: J. Ferron, Lorena Anghel, Régis Leveugle
article: 3rd IEEE Latin American Symposium on Circuits and Systems (LASCAS'12), Feb 2012, Playa del Carmen, Mexico
Accès au bibtex

titre: On the Dependability of 3D Interconnects
auteur: Lorena Anghel
article: Ecole d'hiver Francophone sur les Technologies de Conception des Systèmes embarqués Hétérogènes (FETCH'12), Jan 2012, Alpes d'Huez, France
Accès au bibtex

2011

Journal articles

titre: Adaptive inter-layer message routing in 3D networks-on-chip
auteur: C. Rusu, Lorena Anghel, D. Avresky
article: Microprocessors and Microsystems: Embedded Hardware Design , 2011, 35 (7), pp.613-631. ⟨10.1016/j.micpro.2011.06.008⟩
Accès au bibtex

Conference papers

titre: Designing cost-effective robust systems by accurate reliability modeling
auteur: Lorena Anghel, V. Huard
article: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT'11), Oct 2011, Vancouver, Canada
Accès au bibtex

titre: Analysis of configuration bit criticality in designs implemented with SRAM-based FPGAs
auteur: J. Ferron, Lorena Anghel, Régis Leveugle
article: IEEE Symposium on Industrial Electronics & Applications (ISIEA'11), Sep 2011, Langkawi, Malaysia. pp.83-88
Accès au bibtex

titre: Bottom-up digital system-level reliability modeling
auteur: N.R. Amador, V. Huard, E. Pion, F. Cacho, D. Croain, V. Robert, Sylvain Engels, Philippe Flatresse, Lorena Anghel
article: Custom Integrated Circuits Conference (CICC'11), Sep 2011, San Jose, Ca., United States. pp.1 - 4, ⟨10.1109/CICC.2011.6055343⟩
Accès au bibtex

titre: Electromigration Behavior of 3D-IC TSV
auteur: T. Frank, C. Chappaz, P. Leduc, L. Arnaud, S. Moreau, Aurélie Thuaire, F. Lorut, Lorena Anghel
article: Second IEEE International Workshop on Testing Three-Dimensional Stacked Integrated Circuits (3D IC), in conjuction with ITC, Sep 2011, Anaheim, United States
Accès au bibtex

titre: Memory BIST with address programmability
auteur: A. Fradi, M. Nicolaidis, Lorena Anghel
article: IEEE international On Line Testing Symposium (IOLT'11), Jul 2011, Athenes, Greece. pp.79 - 85, ⟨10.1109/IOLTS.2011.5993815⟩
Accès au bibtex

titre: On the Dependability of 3D Interconnects
auteur: Lorena Anghel, M. Nicolaidis, V. Pasca
article: Dependability Issues in Deep-submicron Technologies Workshop (DDT'11), May 2011, Trondheim, Norway
Accès au bibtex

titre: I-BIRAS: Interconnect Built-In Self-Repair and Adaptive Serialization in 3D Integrated Systems
auteur: M. Nicolaidis, V. Pasca, Lorena Anghel
article: 16th IEEE European Test Symposium (ETS'11), May 2011, Trondheim, Norway. pp.208 - 208, ⟨10.1109/ETS.2011.37⟩
Accès au bibtex

titre: Efficient Fault Detection Architecture Design of Latch-Based Low Power DSP/MCU Processor
auteur: H. Yu, M. Nicolaidis, Lorena Anghel, Nacer-Eddine Zergainoh
article: 16th IEEE European Test Symposium (ETS'11), May 2011, Trondheim, Norway. pp.93 - 98, ⟨10.1109/ETS.2011.20⟩
Accès au bibtex

titre: Criticality of Configuration Bits in SRAM-based FPGAs: Predictive Analysis and Experimental Results
auteur: Lorena Anghel, J. Ferron, Régis Leveugle
article: Workshop on Design for Reliability and Variability (DRVW'11), May 2011, Dana Point, CA, United States
Accès au bibtex

titre: Resistance Increase Due to Electromigration Induced Depletion Under TSV
auteur: T. Frank, C. Chappaz, P. Leduc, L. Arnaud, S. Moreau, Aurélie Thuaire, R. El Farhane, F. Lorut, Lorena Anghel
article: IEEE International Reliability Physics Symposium (IRPS'11), Monterey, CA, USA, April 10-14, Apr 2011, Monterey, ca., United States. pp.3F.4.1 - 3F.4.6, ⟨10.1109/IRPS.2011.5784499⟩
Accès au bibtex

titre: Configurable Thru-Silicon-Via interconnect Built-In Self-Test and diagnosis
auteur: V. Pasca, Lorena Anghel, Mounir Benabdenbi
article: IEEE Latin America Test Symposium Workshop (LATW'11), Mar 2011, Porto de Galinhas (PE), Brazil. pp.1-6, ⟨10.1109/LATW.2011.5985896⟩
Accès au bibtex

2010

Conference papers

titre: Reliability approach of high density Through Silicon Via (TSV)
auteur: T. Frank, C. Chappaz, P. Leduc, L. Arnaud, S. Moreau, Aurélie Thuaire, R. El Farhane, Lorena Anghel
article: 12th Electronics Packaging Technology Conference (EPTC'10), Dec 2010, Singapore, Singapore. pp.321 - 324, ⟨10.1109/EPTC.2010.5702655⟩
Accès au bibtex

titre: I-BIRAS: « Interconnect Built-In Self-Repair and Adaptive-Serialization
auteur: M. Nicolaidis, Lorena Anghel, V. Pasca
article: International Test Conference Workshop on Test of 3D Stacked Systems (3D-TEST), Nov 2010, Austin, TX, United States
Accès au bibtex

titre: Interconnect Built-In Self-Repair and Adaptive-Serialization (I-BIRAS) for 3D integrated systems
auteur: M. Nicolaidis, V. Pasca, Lorena Anghel
article: IEEE International On-Line Testing Symposium (IOLTS'10), Jul 2010, Corfu, Greece. pp.218 - 218, ⟨10.1109/IOLTS.2010.5560198⟩
Accès au bibtex

titre: Configurable Serial Fault-Tolerant Link for Communication in 3D Integrated Systems
auteur: V. Pasca, Lorena Anghel, C. Rusu, Mounir Benabdenbi
article: International On-Line Test Symposium (IOLTS'10), Jul 2010, Corfu, Greece. pp.115-120
Accès au bibtex

titre: RILM: Reconfigurable inter-layer routing mechanism for 3D multi-layer networks-on-chip
auteur: C. Rusu, Lorena Anghel, D. Avresky
article: International On-Line Test Symposium (IOLTS'10), Jul 2010, Corfu, Greece. pp.121-125
Accès au bibtex

titre: Fault Tolerant Communication in 3D Integrated Systems
auteur: V. Pasca, Lorena Anghel, Mounir Benabdenbi
article: DSN Workshop on Dependable Systems and Networks (WDSN'10), Jun 2010, Chicago, United States. pp.131-135
Accès au bibtex

titre: Non-regular 3D mesh Networks-on-Chip
auteur: V. Pasca, Lorena Anghel, C. Rusu, Mounir Benabdenbi
article: DAC Workshop on Diagnostic Services in Network-on-Chips (DSNoC'10), Jun 2010, Anaheim, United States
Accès au bibtex

titre: Configurable Fault-Tolerant Link for Inter-die Communication in 3D on-Chip Networks
auteur: V. Pasca, Lorena Anghel, C. Rusu, Mounir Benabdenbi
article: European Test Symposium (ETS'10), May 2010, Prague, Czech Republic. pp.258
Accès au bibtex

titre: Fault Resilient Intra-die and Inter-die Communication in 3D Integrated Systems
auteur: V. Pasca, Lorena Anghel, Mounir Benabdenbi
article: PhD Research in Microelectronics and Electronics Conference, PRIME 2010, May 2010, Berlin, Germany
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titre: Error Resilience of Inter-Die and Intra-Die Communication with 3D Spidergon STNoC
auteur: V. Pasca, Lorena Anghel, C. Rusu, R. Locatelli, M. Coppola
article: Design Automation and Test in Europe Conference, (DATE'10), Mar 2010, Dresden, Germany. pp.275-278
Accès au bibtex

titre: Checkpoint and rollback recovery in network-on-chip based systems
auteur: C. Rusu, Lorena Anghel
article: Student forum at 15th Asia and South Pacific Design Automation Conference (ASP-DAC'10), Jan 2010, Taipei, Taiwan
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titre: Technology roadmap and evolutions: challenge and criticality
auteur: Lorena Anghel
article: RADPRED Workshop, Jan 2010, Toulouse, France
Accès au bibtex

2009

Conference papers

titre: Message routing in 3D networks-on-chip
auteur: C. Rusu, Lorena Anghel, D. Avresky
article: NORCHIP Conference 2009, Nov 2009, Trondheim, Norway
Accès au bibtex

titre: A methodology and tool for predictive analysis of configuration bit criticality in SRAM-based FPGAs: experimental results
auteur: J. Ferron, Lorena Anghel, Régis Leveugle, A. Bocquillon, F. Miller, G. Mantelet
article: 3rd International Conference on Signals, Circuits & Systems (SCS), Nov 2009, Djerba, Tunisia
Accès au bibtex

titre: Multi-level Fault Tolerance in 2D and 3D NoCs
auteur: Lorena Anghel, C. Rusu
article: Workshop international “NOC in Space Applications Round Table”, European Space Agency, Sep 2009, Noordwijk, Netherlands
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titre: Predictive analysis of configuration bit criticality in SRAM-based FPGAs – Methodology, tools, and results
auteur: J. Ferron, Lorena Anghel, Régis Leveugle
article: 3ème Colloque du GdR SoC-SiP, Jun 2009, Paris, France
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titre: An Effective Approach to Detect Logic Soft Errors in Digital Circuits Based on GRAAL
auteur: H. Yu, M. Nicolaidis, Lorena Anghel
article: 10th International Symposium on Quality of Electronic Design (ISQED'09), Mar 2009, San Jose, CA, United States. pp.236-240, ⟨10.1109/ISQED.2009.4810300⟩
Accès au bibtex

2008

Conference papers

titre: Efficient Coordinated Checkpointing Recovery Schemes for Network-on-Chip based Systems
auteur: C. Rusu, C. Grecu, Lorena Anghel
article: 2nd International Workshop on Dependable Circuit Design (DECIDE'08), Nov 2008, Playa del Carmen, Mexico, Mexico
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titre: Initiation à la conception de VLSI numériques
auteur: Lorena Anghel, Laurent Fesquet, Katell Morin-Allory
article: 10èmes journées pédagogiques CNFM, Nov 2008, Saint-Malo, France
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titre: A flexible network-on-chip simulator for early design space exploration
auteur: C. Grecu, A. Ivanov, S. Saleh, C. Rusu, Lorena Anghel, Pande P.P., V. Nuca
article: 1st Microsystems and Nanoelectronics Research Conference (MNRC 2008), Oct 2008, Ottawa, Canada. pp.33-36, ⟨10.1109/MNRC.2008.4683371⟩
Accès au bibtex

titre: An Analysis and Design Technique to Reduce SET Sensitivity in Combinational Integrated Circuits
auteur: C. Lazzari, T. Assis, F. Kastensmidt, G. Wirth, Lorena Anghel, Ricardo Reis
article: 16th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-Soc'08), Oct 2008, Rhodes Island, Greece. pp.114-117
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titre: Communication Aware Recovery Configurations for Networks-on-Chip
auteur: C. Rusu, C. Grecu, Lorena Anghel
article: 14th IEEE International Symposium On-Line Testing (IOLT'08), Jul 2008, Rhodes, Greece. pp.201-206, ⟨10.1109/IOLTS.2008.44⟩
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titre: Blocking and Non-blocking Checkpointing for Networks-on-Chip
auteur: C. Rusu, C. Grecu, Lorena Anghel
article: 2nd IEEE Workshop on Dependable and Secure Nanocomputing (WDSN'08), Jun 2008, Anchorage, Alaska, United States
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titre: Network-on-Chip Fault Tolerance through Checkpoint and Rollback Recovery
auteur: C. Rusu, C. Grecu, Lorena Anghel
article: National Symposium on System-on-Chip - System-in-Package (GdR SoC-SiP'08),, Jun 2008, Paris, France
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titre: SET-Factor: An Analysis and Design Tool to Reduce SET Sensitivity in Integrated Circuits
auteur: C. Lazzari, T. Assis, F. Kastensmidt, G. Wirth, Lorena Anghel, Ricardo Reis
article: 13th IEEE European Test Symposium (ETS'08), May 2008, Verbania, Italy
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titre: Improving the Scalability of Checkpoint Recovery for Networks-on-Chip
auteur: C. Rusu, C. Grecu, Lorena Anghel
article: IEEE International Symposium on Circuits and Systems (ISCAS'08), Seattle, May 2008, Washington, United States. pp.2793-2796, ⟨10.1109/ISCAS.2008.4542037⟩
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titre: Structures robustes pour circuits logiques à base de CNTFET
auteur: T. Dang, Lorena Anghel, Régis Leveugle
article: 11ème Journées Nationales du Réseau Doctoral en Microélectronique (JNRDM'08), May 2008, Bordeaux, France. pp.66
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titre: Coordinated versus Uncoordinated Checkpoint Recovery for Network-on-Chip based Systems
auteur: C. Rusu, C. Grecu, Lorena Anghel
article: 4th IEEE International Symposium on Electronic Design, Test and Applications (DELTA'08), Jan 2008, Hong Kong, China. pp.32-37, ⟨10.1109/DELTA.2008.75⟩
Accès au bibtex

2007

Journal articles

titre: A Case Study on Phase-Locked Loop Automatic Layout Generation and Transient Fault Injection Analysis
auteur: C. Lazzari, Lorena Anghel, Ricardo Reis
article: Journal of Electronic Testing: : Theory and Applications, 2007, 23 (6), pp.625-633. ⟨10.1007/s10836-007-5055-x⟩
Accès au bibtex

titre: CNTFET modeling and reconfigurable logic circuit design
auteur: Ian O'Connor, Junchen Liu, Frédéric Gaffiot, Fabien Prégaldiny, Cristell Maneux, C. Lallement, Johnny Goguet, Sebastien Fregonese, Thomas Zimmer, Lorena Anghel, Régis Leveugle, T. Dang
article: IEEE Transactions on Circuits and Systems, 2007, 54 (11), pp.2365-2379. ⟨10.1109/TCSI.2007.907835⟩
Accès au bibtex

Conference papers

titre: CNTFET-based CMOS-like gates and dispersion of characteristics
auteur: T. Dang, Lorena Anghel, V. Pasca, Régis Leveugle
article: International Design and Test Workshop (IDT'07), Dec 2007, Cairo, Egypt. pp.151-156
Accès au bibtex

titre: Efficient Transistor Sizing for Soft Error Protection in Combinational Logic Circuits
auteur: C. Lazzari, F. Lima, Lorena Anghel, Ricardo Reis
article: 2nd International Workshop on Dependable Circuit Design (DECIDE’07), Dec 2007, Buenos Aires, Argentina
Accès au bibtex

titre: Efficient Timing Closure with a Transistor Level Design Flow
auteur: C. Lazzari, Cr. Santos, A. Ziesemer, Lorena Anghel, Ricardo Reis
article: IFIP International Conference on Very Large Scale Integration (VLSI-SoC'07), Oct 2007, Atlanta, GA, United States. pp.312-315
Accès au bibtex

titre: Essential Fault-Tolerance Metrics for NoC Infrastructures
auteur: C. Grecu, Lorena Anghel, Pande P.P., A. Ivanov, R. Saleh
article: IEEE International On-Line Test Symposium (IOLT'07), Jul 2007, Crete, Greece. pp.37-42, ⟨10.1109/IOLTS.2007.31⟩
Accès au bibtex

titre: Multiple Event Transient Induced by Nuclear Reactions in CMOS Logic Cells
auteur: C. Rusu, A. Bougerol, Lorena Anghel, C. Weulerse, N. Buard, S. Benhammadi, N. Renaud, Frédéric Wrobel, T. Carriere
article: 13th IEEE International On-Line Testing symposium (IOLT'07), Jul 2007, Crete, Greece. pp.137-145, ⟨10.1109/IOLTS.2007.46⟩
Accès au bibtex

titre: Defect Tolerant Logic Gates for Unreliable Future Nanotechnologies
auteur: Lorena Anghel, M. Nicolaidis
article: International Conference on Artificial Neural Networks (IWANN), Jun 2007, San Sebastian, Spain. pp.422-429, ⟨10.1007/978-3-540-73007-1⟩
Accès au bibtex

titre: CNTFET-based logic gates and characteristics
auteur: T. Dang, Lorena Anghel, Régis Leveugle
article: Silicon Nanoelectronics Workshop (SNW'07), Jun 2007, Kyoto, Japan. pp.2
Accès au bibtex

titre: Defects Tolerant Logic Gates for Unreliable Future Nanotechnologies
auteur: Lorena Anghel, M. Nicolaidis
article: Special Session of International Work-Conference on Artificial Neural Networks (IWANN'07), Jun 2007, San Sebastian, Spain
Accès au bibtex

titre: SET fault injection methods in analog circuits: case study
auteur: A. Ammari, Lorena Anghel, Régis Leveugle, C. Lazzari, Ricardo Reis
article: 8th Latin-American Test Workshop (LATW'07), Mar 2007, Cuzco, Peru. pp.155-160
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titre: Tools and methodology development for pulsed laser fault injection in SRAM-based FPGAs
auteur: V. Pouget, A. Douin, D. Lewis, P. Fouillat, G. Foucard, P. Peronnard, V. Maingot, J. Ferron, Lorena Anghel, Régis Leveugle, Raoul Velazco
article: 8th Latin-American Test Workshop (LATW'07), 2007, Cuzco, Peru. pp.Session 8
Accès au bibtex

Book sections

titre: Multilevel Fault Effects Evaluation
auteur: Lorena Anghel, M. Rebaudengo, M. Sonza Reorda, M. Violante
article: RAOUL VELAZCO, PASCAL FOUILLAT and RICARDO REIS. Radiation Effects on Embedded Systems, Springer, pp.69-88, 2007, ISBN :978-1-4020-5645-1, ⟨10.1007/978-1-4020-5646-8⟩
Accès au bibtex

titre: A Transistor Placement Technique Using Genetic Algorithm And Analytical Programming
auteur: C. Lazzari, Lorena Anghel, Ricardo Reis
article: VLSI-SOC: From Systems to Silicon, (selected contributions from VLSI-SoC'05), Springer, pp.331-344, Vol.240, 2007, Series: IFIP International Federation for Information Processing, ⟨10.1007/978-0-387-73661-7_21⟩
Accès au bibtex

titre: Defects Tolerant Logic Gates for Unreliable Future Nanotechnologies
auteur: Lorena Anghel, M. Nicolaidis
article: Computational and Ambient Intelligence, Springer, pp.422-429, 2007, ISBN :978-3-540-73006-4, ⟨10.1007/978-3-540-73007-1_52⟩
Accès au bibtex

titre: Cost Reduction and Evaluation of a Temporary Faults Detecting Technique
auteur: Lorena Anghel, M. Nicolaidis
article: Rudy Lauwereins and Jan Madsen. Design, Automation, and Test in Europe (DATE) “The Most Influential Papers of 10 Years”, Springer, pp.423-438, 2007, ISBN :978-1-4020-6487-6, ⟨10.1007/978-1-4020-6488-3_31⟩
Accès au bibtex

Habilitation à diriger des recherches

titre: CMOS and post CMOS Robust Design
auteur: Lorena Anghel
article: Micro et nanotechnologies/Microélectronique. Institut National Polytechnique de Grenoble - INPG, 2007
Accès au texte intégral et bibtex

2006

Conference papers

titre: CNTFET-based logic gates and simulation
auteur: T. Dang, Lorena Anghel, Régis Leveugle
article: IEEE International Design and Test Workshop (IDT'06, Nov 2006, Dubai, United Arab Emirates. 6 p
Accès au bibtex

titre: SET and SEU effects at multiple abstraction levels
auteur: Lorena Anghel
article: Single Event Effects Symposium (SEE'06), Jun 2006, Long Beach, CA,, United States
Accès au bibtex

titre: Multiple Defects Tolerant Devices for Unreliable Future Nanotechnologies
auteur: C. Lazzari, Lorena Anghel, M. Nicolaidis
article: IEEE Latin American Test Workshop (LATW'06), Mar 2006, Buenos Aires, Argentina
Accès au bibtex

titre: CNTFET basics and simulation
auteur: T. Dang, Lorena Anghel, Régis Leveugle
article: Design and Test of Integrated Systems (DTIS'06), 2006, Tunis, Tunisia. pp.28-33
Accès au bibtex

titre: Prediction of transients induced by neutrons/protons in CMOS combinational logic cells
auteur: A. Hubert, A. Bougerol, F. Miller, N. Buard, Lorena Anghel, T. Carriere, Frédéric Wrobel, R. Gaillard
article: 12th IEEE International On-Line Testing Symposium (IOLTS'06), 2006, Lake Como, Italy. 9 pp., ⟨10.1109/IOLTS.2006.51⟩
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titre: Phase-Locked Loop Automatic Layout Generation and Transient Fault Injection Analysis: A Case Study
auteur: C. Lazzari, Ricardo Reis, Lorena Anghel
article: 12th IEEE International On-Line Testing Symposium (IOLTS'06), 2006, Lake Como, Italy. pp.165-172, ⟨10.1109/IOLTS.2006.48⟩
Accès au bibtex

2005

Journal articles

titre: Memory Defect Tolerance Architectures for Nanotechnologies
auteur: M. Nicolaidis, Lorena Anghel, M.N. Achouri
article: Journal of Electronic Testing: : Theory and Applications, 2005, Vol. 21, No. 4, August, pp.445 - 455. ⟨10.1007/s10836-005-0971-0⟩
Accès au bibtex

Conference papers

titre: Transient and permanent fault tolerance memory cells for unreliable future nanotechnologies
auteur: Lorena Anghel, E. Kolonis, M. Nicolaidis
article: IEEE Latin American Test Workshop (LATW'05), Mar 2005, Salvador Bahia, Brazil. pp.187-192
Accès au bibtex

titre: Soft error circuit hardening techniques implementation using an automatic layout generator
auteur: C. Lazzari, Lorena Anghel, Ricardo Reis
article: Proceedings of IEEE Latin American Test Workshop (LATW'05), Mar 2005, Salvador Bahia, Brazil. pp.175-180
Accès au bibtex

titre: Simulation and mitigation of single event effects
auteur: Lorena Anghel, M. Nicolaidis
article: 11th-IEEE-International-On-Line-Testing-Symposium, 2005, French Riviera, France. pp.81, ⟨10.1109/IOLTS.2005.65⟩
Accès au bibtex

titre: Evaluation of SET and SEU effects at multiple abstraction levels
auteur: Lorena Anghel, Régis Leveugle, Pierre Vanhauwaert
article: 11th-IEEE-International-On-Line-Testing-Symposium., 2005, French Riviera, France. pp.309-12, ⟨10.1109/IOLTS.2005.28⟩
Accès au bibtex

titre: On implementing a soft error hardening technique by using an automatic layout generator: case study
auteur: C. Lazzari, Lorena Anghel, Ricardo Reis
article: 11th-IEEE-International-On-Line-Testing-Symposium., 2005, French Riviera, France. pp.29-34, ⟨10.1109/IOLTS.2005.45⟩
Accès au bibtex

Books

titre: Proceedings of 11th IEEE International On-Line Testing Symposium (IOLT 2005)Saint Raphael, French Riviera, France, July 6-8, 2005
auteur: M. Nicolaidis, Lorena Anghel
article: IEEE, 330 p., 2005
Accès au bibtex

2004

Journal articles

titre: Simulating single event transients in VDSM ICs for ground level radiation
auteur: D. Alexandrescu, Lorena Anghel, M. Nicolaidis
article: Journal of Electronic Testing: : Theory and Applications, 2004, Aug. ; 20(4), pp.413-21. ⟨10.1023/B:JETT.0000039608.48856.33⟩
Accès au bibtex

Conference papers

titre: A Diversified Memory Built-In Self-Repair Approach for Nanotechnologies
auteur: M. Nicolaidis, M.N. Achouri, Lorena Anghel
article: 22nd IEEE VLSI Test Symposium, 2004, Napa Valley, United States. pp.313, ⟨10.1109/VTEST.2004.1299258⟩
Accès au bibtex

titre: Evaluation of Memory Built-in Self Repair Techniques for High Defect Density Technologies
auteur: Lorena Anghel, M. Nicolaidis, M.N. Achouri
article: 10th IEEE Pacific Rim International Symposium on Dependable Computing (PRDC'04), 2004, Tahiti, Papeete French Polynesia, France. pp.315-320, ⟨10.1109/PRDC.2004.1276581⟩
Accès au bibtex

titre: Coupling Different Methodologies to Validate Obsolete Microprocessors
auteur: Lorena Anghel, Raoul Velazco, E. Sanchez, M. Sonza Reorda, G. Squillero
article: 19th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'04), 2004, Cannes, France. pp.250-255, ⟨10.1109/DFT.2004.21⟩
Accès au bibtex

2003

Conference papers

titre: A Methodology for Test Replacement Solutions of Obsolete Processors
auteur: Raoul Velazco, Lorena Anghel, S. Saleh
article: 9th IEEE International On-Line Testing Symposium, 2003, Kos International Convention Center, Kos Island, Greece. pp.209, ⟨10.1109/OLT.2003.1214400⟩
Accès au bibtex

titre: Preliminary Validation of an Approach Dealing with Processor Obsolescence
auteur: Lorena Anghel, Raoul Velazco, S. Saleh, S. Deswaertes, A. El Moucary
article: 18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'03), 2003, Boston, Cambridge, Ma, United States. pp.493, ⟨10.1109/DFTVS.2003.1250148⟩
Accès au bibtex

titre: A Memory Built-In Self-Repair for High Defect Densities Based on Error Polarities
auteur: M. Nicolaidis, M.N. Achouri, Lorena Anghel
article: 18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'03), 2003, Boston, Cambridge, Ma,, United States. pp.459, ⟨10.1109/DFTVS.2003.1250144⟩
Accès au bibtex

titre: Memory Built-In Self-Repair for Nanotechnologies
auteur: M. Nicolaidis, M.N. Achouri, Lorena Anghel
article: 9th IEEE International On-Line Testing Symposium, 2003, Kos International Convention Center, Kos Island, Greece. pp.94-8, ⟨10.1109/OLT.2003.1214373⟩
Accès au bibtex

2002

Conference papers

titre: Simulating single event transients in DVSM ICs for ground level radiation
auteur: D. Alexandrescu, M. Nicolaidis, Lorena Anghel
article: 3rd IEEE Latin American Test Workshop (LATW'02), Feb 2002, Montevideo, Uruguay
Accès au bibtex

titre: New methods for evaluating the impact of single event transients in VDSM ICs
auteur: D. Alexandrescu, Lorena Anghel, M. Nicolaidis
article: Proceedings-17th-IEEE-International-Symposium-on-Defect-and-Fault-Tolerance-in-VLSI-Systems.-DFT-2002, 2002, Vancouver, BC, Canada. pp.99-107, ⟨10.1109/DFTVS.2002.1173506⟩
Accès au bibtex